The present invention relates generally to estimating the power consumption of a semiconductor chip design. More particularly, the invention relates to a system for estimating power consumption of a semiconductor chip design described at the register transfer level.
As electrical design of circuit boards and semiconductor chips grew in complexity and th(time-to-market requirements shrank drastically, industry and academia focused on computer-aided design tools that estimated, among other things, a given design's power consumption. The demand for battery-powered equipment and other market forces have caused users to desire integrated circuits with lower levels of power consumption. At the same time, the complexity of the designs and the resulting increase in circuit densities and operating frequencies are increasing the power consumed by the design.
Many commercially available computer-aided design tools relied upon by users estimate the power consumption of a semiconductor chip design specified at the logic level or the circuit level. To receive an accurate power estimate using these tools, the user must specify in detail the design with gates or transistors.
Although synthesis tools may be used to specify the design to the required level of detail, such tools require the user to make many detailed architectural and technology implementation choices early in the design process. The user must detail the choices and input the same into the synthesis tool, which outputs the information necessary to run the power consumption estimation. If the power consumption estimate exceeds the desired level and the user seeks to further refine the design, the user must make new choices and input the resulting design changes. This iterative design change process is particularly tedious and time consuming due to the detailed architectural and technology implementation choices the user must re-input with each design change iteration. The prior art methods do not allow the user to change the design to meet required power specifications easily, and all changes result in duplication of the time the user expended formatting the inputs for the synthesis process. Moreover, the synthesis process requires a large amount of computer run time. Further, when a synthesis tool requires the user to describe a system to the logic level with hundreds of thousands of gates, for example, the user finds it difficult and confusing to comprehend the functionality of the entire chip or system.
To alleviate the above concerns, academia and industry have begun to focus on computer-aided tools that accept circuit descriptions at a higher level of abstraction, the register transfer level.. One prior art system, however, still requires that the user make architectural and technology implementation choices, thus requiring specifications on all the circuit elements prior to performing the power consumption estimation. While having some of the benefits of working at the register transfer level, the tool still requires the user to re-input many details regarding each design change iteration, thus resulting in much duplication of effort each time the user must change the design to meet the desired power specifications.
Another prior art system results in less work duplication, but only analyzes part of the power consumed by the chip or system. Moreover, the prior art system treats the chip or system as an inseparable entity, and does not provide power estimates of the different parts or modes of the system or chip.
Accordingly, it is an object of the invention to provide a system for estimating the power consumption of a semiconductor chip design or system that allows a user to estimate the power consumption of a design specified at the register transfer level and forgo specifying all of the gates before producing a power consumption estimation.
It is another object of this invention to allow the user to easily change the architectural and technology implementation choices and evaluate the effect of such changes on the power consumption of the semiconductor chip design or system.
It is still another object of this invention to perform power estimations quickly without requiring a large amount of computer run time.
It is a further object of this invention to estimate the power consumed by the entire semiconductor chip or system and its parts in all its modes.
These and other objects will be obvious and will appear hereinafter.